Interconnect crosstalk noise estimation for high speed integrated circuits

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DC Field	Value	Language
dc.contributor.author	Kalpana A.B
dc.contributor.author	Hunagund P.V.
dc.date.accessioned	2020-06-12T15:01:02Z	-
dc.date.available	2020-06-12T15:01:02Z	-
dc.date.issued	2013
dc.identifier.citation	IET Conference Publications , Vol. 2013 , 648 CP , p. -	en_US
dc.identifier.uri	http://gukir.inflibnet.ac.in:8080/jspui/handle/123456789/3617	-
dc.description.abstract	This paper presents an accurate Crosstalk noise model for the noise constrained VLSI Interconnect optimization. Compared to earlier crosstalk models, our 8-? model considers the key parameters such as coarse distribution RC characteristics for the victim net and coupling locations, it is very much essential to estimate crosstalk noise peak and noise width to optimize noise aware layout in deep sub-micron technologies.	en_US
dc.publisher	Institution of Engineering and Technology
dc.subject	Crosstalk
dc.subject	Distributed
dc.subject	Interconnect
dc.subject	Model
dc.subject	Noise
dc.title	Interconnect crosstalk noise estimation for high speed integrated circuits	en_US
dc.type	Conference Paper
Appears in Collections:	2. Conference Papers

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